Pepper’s Switch and Gateway IP on FPGA and ARM streamlines the design of edge switches, gateways, and routers, making high-performance, secure network solutions a breeze to implement.
Software specification
Includes a wide-range of modern packet processing features, including virtual overlay networking with programmable tunnel header encapsulation and robust QoS, load-balancing schemes, and advanced congestion mechanisms, designed to meet the modern networks’ needs.
The packet processing blocks are responsible for packet forwarding, filtering, header editing, and collecting statistics.
The key features include – Major Layer 2 protocols, Major Layer 3 protocols, support for Unicast and Multicast packets, QoS and IPv4/6.
“Unleash the fastest Layer 2/3 IP for instant, high-performance networking and routing at the Edge!”
Customizable from the Ground Up
Pepper stands out by offering full customization at every level—from RTL code and embedded software to middleware and application programming. This includes a full Layer 2/3 network stack and a customizable AES encryption IP built into the FPGA, allowing you to tailor the platform to your specific application needs. The open GPIO interface further enhances its versatility, enabling you to plug in a wide range of carrier boards to build completely bespoke solutions.
Advanced Security and Network Management
Security is paramount in today’s connected world. Pepper is equipped with robust security features, including AES encryption, multiple VPN protocols, and advanced firewall options. With TCP, UDP, IPv4, IPv6, and a host of other protocols, Pepper ensures secure and reliable communication across networks.